This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. P2001-386703, filed on Dec. 19, 2001; the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a level shift circuit converting a signal level between two circuits supplied by different power sources respectively.
2. Description of the Related Art
A level shift circuit 200 shown in FIG. 1A is used to convert a signal of amplitude Va received from a circuit 201 to a signal of amplitude Vb supplied to a circuit 204. The level shift circuit 200 consists of an inverter 202, and an inverter 203 having an input terminal connected to an output terminal of the inverter 202. The voltage Va is supplied to the circuit 201 and to the inverter 202 from a power source VCC1. The voltage Vb is supplied to the inverter 203 and to the circuit 204 from a power source VCC2.
When the voltage of an input signal Vin transmitted from the circuit 201 becomes larger than a threshold voltage Vth(a) of the inverter 202, the output voltage V1 of the inverter 202 starts increasing. When the output voltage V1 of the inverter 202 becomes smaller than a threshold voltage Vth(b) of the inverter 203, the output signal Vout supplied from an output terminal of the inverter 203 starts increasing. The output signal Vout is supplied to the circuit 204. However, the threshold voltage Vth(b) of the inverter 203 is different from the threshold voltage Vth(a) of the inverter 202, because the inverters 202 and 203 are supplied with different voltages Va and Vb. In other words, a trailing edge of the output signal Vout is delayed, because the threshold voltage Vth(b) is different from the threshold voltage Vth(a). As shown in FIG. 1B, a low level period TBoff of the output signal Vout is longer than a high level period TBon. In other words, a duty of the output signal Vout is different from a duty of the input signal Vin.
In a aspect of the present invention, a level shift circuit encompasses a first transmission circuit configured to transmit a leading edge of an input signal, a second transmission circuit configured to transmit a trailing edge of the input signal, and a composite circuit configured to generate an output signal by synthesizing the leading edge and the trailing edge.